The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits formed on larger wafers than the previous generation. Technologies, such as three-dimensional integrated circuits (3D ICs) and through silicon vias (TSVs), are also used to further decrease the number and length of interconnections between electrical components formed on the ICs as the number of electrical components increases. In some applications, the 3D IC and TSV technologies include performing a backside thinning (or grinding) process to a wafer for obtaining thinner chips or dies. This is accomplished by mounting a front side of the wafer to a carrier and then removing a predetermined amount of material from the back side of the wafer after the electrical components for the circuit and/or TSVs have been fabricated on the front side of the wafer.